1. Field of the Invention
The present invention relates to image processing systems, and more particularly to an image processing system capable of carrying out local processing for an image at high speed.
2. Description of the Prior Art
According to a fundamental method for processing a local region on an image, as disclosed in, for example, the Unger U.S. Pat. No. 3,106,698, a plurality of processors for carrying out local processing are arranged for predetermined local regions, to carryout parallel processing for the local regions. Further, according to another method, in order to extract a local region composed of m.times.n pixels from an image, a shift register with a storage capacity corresponding to (m-1) rows of the image is connected in cascade with another shift register corresponding to n pixels, and image data is supplied to the cascade-connected shift registers in a scanning order bit by bit. Then, image data is delivered from m.times.n bits of the shift registers which bits have a predetermined positional relation, in parallel. That is, a local region composed of m.times.n pixels is extracted from the image. A plurality of local images thus obtained are successively processed by a local image processor.
The processing speed of image processing according to the latter method can be increased by dividing the image data into two parts in a vertical direction (namely, sub-scanning direction) and by operating two process corresponding to the above parts in parallel. Further, as described in the Sternberg U.S. Pat. No. 4,174,514 image data is divided into a plurality of parts in a horizontal direction (namely, main scanning direction) and parallel processing is carried out for the above parts.
The latter method, in which an image to be processed is divided into a plurality of parts in a vertical or horizontal direction, and local images are processed in parallel in respective parts, is not effective for increasing the speed of image processing in a system for transmitting image data in a scanning order bit by bit, such as a facsimile system. Further, let us consider a case where image data is stored in a one-dimensional memory, by way of example. Usually, rows in a two-dimensional image are successively read out from top to bottom, and image data in the read-out rows is arranged in succession, to form one-dimensional image data, which is stored in the one-dimensional memory. In this case, a single memory access can refer to only data indicative of a plurality of consecutive pixels in the same row, or only the above data can be written in a processing circuit by a single memory access. That is, in order to refer to image data in k regions, or to write the above image data in processing circuits, it is necessary to make k memory accesses. In this case, where the speed of access to the memory is higher than the processing speed for a local region, there arises no problem. However, when the access speed is slower than the processing speed, the effect of parallel processing for a plurality of regions will be reduced by slow memory access. Further, according to this method, it is required to provide a plurality of means for accessing original image data, for example, direct memory access controllers (DMAC's), the number of which is equal to the number of parallel processing systems. Accordingly, the hardware used is complicated, and large in size.
Further, according to the former method, in which a plurality of processors are arranged for predetermined local regions, image processing can be carried out at high speed, but an apparatus for image processing is very large in scale. Further, in order to supply data to a plurality of processors at the same time, it is necessary to read out data from a plurality of positions on an original image at the same time. Accordingly, an image memory is required to have a special structure.